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提高放大器增益通常采用电压型辅助运放,但由于引入了共模反馈电路,增加了运放的复杂度,同时也增大了面积和功耗。基于此问题提出了一种消除共模反馈电流辅助放大的高增益运算放大器。此放大器主要由一个主放大器与两个电流辅助放大器构成,整体结构都采用了差分输入单端输出,消除了共模反馈电路。同时电流辅助放大器结构简单,减小了电路面积,降低了功耗。输出级对传统AB类放大器进行了改进,实现了轨到轨电压的输出。电路采用0.35μm CMOS工艺实现,运用Candence软件进行仿真。仿真结果表明,在5 V电源电压下,开环增益为167.5 dB,相位裕度为70°,电源抑制比(PSRR)为128 dB,共模抑制比(CMRR)为138 dB。
Abstract：To increase the gain of an amplifier, a voltage-type auxiliary op amp is usually used. However, the introduction of a common mode feedback circuit often causes complexity of the op amp and increases the area and power consumption. As a result, this article proposed a current-aided gain-boosted amplifier with common mode feedback canceling. This amplifier was mainly composed of a main amplifier and two current auxiliary amplifiers. The overall structure adopted differential input and single-ended output, eliminating the common mode feedback circuit. At the same time, the current-assisted amplifier had a simple structure, which reduced the circuit area and power consumption. The output stage was improved from the traditional class AB amplifier to achieve the rail-to-rail voltage output. The circuit was implemented in 0.35 μm CMOS technology and simulated by Candence software. The simulation results show that the open-loop gain is 167.5 dB, the phase margin is 70°, the PSRR is 128 dB, and the CMRR is 138 dB under 5 V supply voltage.
[1] 商锋，李亚军，樊红宛.一种平坦高增益的宽带低噪声放大器设计 [J].西安邮电大学学报，2017,22(4):57-61.
[2] 谢海情，陈玉辉，王振宇.一种低压低功耗恒跨导轨到轨运算放大器设计 [J].电子元件与材料，2020,39(10):65-69.
[3] Yang H C,Allstot D J.An equivalent circuit model for two-stage operational amplifiers [C]//1988 IEEE International Symposium on Circuits and Systems.NY,USA:IEEE,1988:635-638.
[4] Bult K,Geelen G.A fast-settling CMOS op amp for SC circuits with 90 dB DC gain [J].IEEE Journal of Solid-State Circuits,1990,25(6):1379-1384.
[5] 朱江南，杨兵，姜岩峰.一种高增益全差分运算放大器的分析与设计 [J].微电子学，2015,45(6):714-717.
[6] Far A.Enhanced gain,low voltage,rail-to-rail buffer amplifier suitable for energy harvesting [C]//2017 IEEE International Autumn Meeting on Power,Electronics and Computing (ROPEC).NY,USA:IEEE,2017:1-6.
[7] 唐俊龙，黄思齐，罗磊，等.一种恒跨导高增益轨到轨运算放大器 [J].微电子学，2018,48(4):458-462.
[8] 田海燕，李斌，廖春连.一种适于Sigma-Delta ADC的高增益放大器的设计 [J].计算机测量与控制，2019,27(10):268-272.
[9] Banda G P,Sen S.A low voltage cascode biasing circuit with gain-boosting [C]//2015 IEEE International Conference on Electronics,Computing and Communication Technologies (CONECCT).NY,USA:IEEE,2015:1-4.
[10] Ho M,Bu S,Zheng Y,et al.A 124 dB double-gain-boosted cascode amplifier with 92% rail-to-rail output swing [C]//2014 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS).NY,USA:IEEE,2014:181-184.
[11] Kai J,Ningmei Y,Quan X.A 168 dB high gain folded cascode operational amplifier for Delta-Sigma ADC [C]//2019 IEEE 14th Conference on Industrial Electronics and Applications (ICIEA).NY,USA:IEEE,2019:2228-2231.
[12] 史志峰，王卫东.一种全差分增益增强型运算放大器的设计 [J].电子器件，2015,38(1):78-82.
[13] Far A.Class AB amplifier with noise reduction,speed boost,gain enhancement,and ultra low power [C]//2018 IEEE 9th Latin American Symposium on Circuits & Systems (LASCAS).NY,USA:IEEE,2018:1-4.
[14] Zhang X,Masry E I.A high-performance,low-voltage,body-driven CMOS current mirror [C]//2002 IEEE Circuits and Systems(ISCAS).NY,USA:IEEE,2002:V49-V52.
[15] Zhang X,Masry E I.A regulated body-driven CMOS current mirror for low-voltage applications [J].IEEE Transactions on Circuits and Systems II:Express Briefs,2004,51(10):571-577.
[16] Najjarzadegan M,Jalili A,Dehghani R.A high-speed,high-gain OTA structure with a new compensation technique [C]//2015 IEEE 23rd Iranian Conference on Electrical Engineering.NY,USA:IEEE,2015:1332-1335.
基本信息:
DOI：10.14106/j.cnki.1001-2028.2021.0110
中图分类号:TN722.77
引用信息:
[1]刘伟,孙正龙,黄东,等.一种消除共模反馈电流辅助放大的高增益运放[J].电子元件与材料,2021,40(12):1261-1266.DOI:10.14106/j.cnki.1001-2028.2021.0110.
基金信息:
陕西省自然科学基础研究计划(2020JM-583)
2021-12-05
2021-12-05